AMD Pledges $10B Taiwan Investment for 2.5D EFB Packaging and Ramps 2nm “Venice” CPUs
AMD will invest more than $10 billion in Taiwan to expand EFB-based 2.5D packaging for its 6th Gen EPYC “Venice” CPUs and boost AMD Helios rack-scale AI platform deployments in 2H 2026. AMD has started production ramp of “Venice” on TSMC’s 2nm process with planned capacity add at TSMC Arizona.
1. Taiwan Ecosystem Investment
AMD announced over $10 billion in investments across the Taiwan ecosystem with partners including ASE, SPIL and PTI to develop next-generation wafer-based 2.5D Elevated Fanout Bridge interconnect technology. These efforts aim to increase interconnect bandwidth, improve power efficiency for 6th Gen EPYC “Venice” CPUs and support multi-gigawatt AMD Helios rack-scale AI platform deployments in second half of 2026.
2. “Venice” 2nm Production Ramp
The company has begun volume production ramp of its 6th Gen EPYC “Venice” processors on TSMC’s advanced 2nm process in Taiwan, marking the industry’s first HPC CPU on 2nm. Plans are in place to expand manufacturing capacity at TSMC’s Arizona facility to strengthen AMD’s global data center CPU supply and meet growing AI infrastructure demand.