Google Eyes Intel’s EMIB for AI Chips as TSMC CoWoS Faces Capacity Crunch
Google is evaluating Intel’s EMIB advanced packaging platform alongside TSMC’s CoWoS for its next-generation AI ASICs, joining MediaTek’s dual-partnership strategy. Google’s push for CoWoS alternatives follows capacity constraints at TSMC and underscores potential supply-chain diversification.
1. Google Considers Intel EMIB Partnership
Google has initiated evaluations of Intel’s EMIB advanced packaging for its custom AI ASICs to reduce dependence on TSMC’s CoWoS ecosystem. The move aligns with MediaTek’s strategy of securing partnerships with both TSMC and Intel to mitigate packaging capacity risks.
2. TSMC CoWoS Capacity Constraints
TSMC’s CoWoS platform has experienced backlog-driven delays as hyperscaler demand for AI chips surges. Google’s interest in EMIB reflects concerns over lead-time extensions and wafer availability at TSMC’s CoWoS facilities.
3. Implications for Google’s AI Supply Chain
Adopting Intel’s EMIB could diversify Google’s chip supply chain and potentially lower packaging costs, but it may require design validation and performance benchmarking. A dual-sourcing approach may enhance production resilience ahead of Google’s next AI accelerator rollout.
