Intel’s Altera teams up with Riverlane on quantum error correction support for Agilex FPGAs
INTC•Partner program expansion
Riverlane joined the Altera Solutions Acceleration Partner Program, expanding Altera’s partner ecosystem for FPGA-based quantum control systems.
Altera and Riverlane partner on quantum error correction
Intel’s Altera unit partnered with Riverlane to support real-time quantum error correction on Agilex FPGAs.
Riverlane validated its QEC Interface (QECi) design example on an Agilex 7 FPGA, targeting low-latency data movement.
The collaboration aims to help quantum hardware developers scale parallel processing, improve deterministic timing and reduce integration complexity.
