Lightwave Logic Secures Fourth Stage-3 Design Win, Targets 400Gb/s PICs
Lightwave Logic announced a Fortune Global 500 customer has entered Stage 3 (prototype-to-product) of its Design Win Cycle, becoming the fourth to reach this phase. It plans to fabricate and test EO polymer-integrated silicon photonic chips supporting 200Gb/s and 400Gb/s for hyperscale data centers by 2026 milestones.
1. Design Win Advancement
Lightwave Logic has moved a Fortune Global 500 customer into Stage 3 (prototype-to-final product) of its Design Win Cycle, marking four total customers at this development stage.
2. 2026 Technical Milestones
Following technical evaluation of its Perkinamine platform, the company will fabricate, process, and test EO polymer-integrated silicon photonic integrated circuits capable of 200Gb/s and 400Gb/s, aiming deployment in hyperscale data centers and AI factory environments.
3. Earnings Call Details
Financial results for the fourth quarter and full year 2025 will be released before U.S. markets open on March 5, 2026, followed by a live webcast conference call at 8:30 a.m. Eastern Time with a Q&A session.