Microchip teams with Micron to demo PCIe Gen 6 storage architecture for AI, data centers
MCHP•Microchip and Micron demo PCIe Gen 6 storage architecture
Microchip teamed with Micron to demonstrate an end-to-end PCIe 6 storage architecture for AI and data center infrastructure at the 2026 FMS conference.
- The demo paired Switchtec PCIe 6 switches with Micron’s 9650 NVMe SSDs to support higher throughput, lower latency and scalable connectivity.
- The architecture targets composable, disaggregated designs to scale storage resources while maintaining predictable performance for AI, HPC and cloud workloads.
- Microchip highlighted PCIe 6.0 doubling PCIe 5.0 bandwidth to 64 GT/s per lane to meet rising data movement demands.
