SEALSQ subsidiary IC’Alps advances QASIC quantum-resistant ASIC roadmap toward 2026 prototype
LAES•Initial commercial focus
The initial commercial focus centers on cybersecurity, medical devices, and automotive systems, where long-lived hardware faces rising quantum-computing risk.
IC’Alps custom-chip capabilities
IC’Alps adds custom-chip design capabilities, including RISC-V SoC infrastructure, mixed-signal design, functional safety, certified production, and lifecycle management.
QASIC program advances toward prototype
SEALSQ’s French ASIC design subsidiary IC’Alps advanced its QASIC program to embed post-quantum security into customer-owned chips.
The roadmap targets the first QASIC prototype in 2026, aiming to prove quantum-resistant security integration without sacrificing safety, performance, power, or reliability.
