SEALSQ to Debut QVault TPM and QS7001 MCU at Embedded World 2026
SEALSQ will exhibit at Embedded World 2026 March 10–12 in Nuremberg (Hall 5 Booth 178), debuting quantum-resistant QVault TPM and QS7001 secure RISC-V microcontroller. Subsidiary IC’Alps will present turnkey ASIC/SoC services with TSMC, Intel Foundry and other partners, plus a TPM-FPGA design with Lattice demonstrating NIST and CNSA 2.0 compliance.
1. Embedded World 2026 Participation
SEALSQ will exhibit at Embedded World 2026 from March 10–12 at the Exhibition Centre Nuremberg in Germany. The booth, located in Hall 5, Booth 178, features a Formula One racing theme tied to the company’s partnership with the BWT Alpine Formula One Team, emphasizing performance and precision.
2. Quantum-Resistant Chip Showcase
At Hall 5, SEALSQ will debut QVault TPM, a standalone security chip with hardware-isolated key storage, secure boot, device attestation and platform integrity verification, alongside QS7001, a secure RISC-V microcontroller with native post-quantum cryptography algorithms and hardware Root of Trust optimized for industrial, automotive and IoT edge devices.
3. ASIC/SoC Design Services via IC’Alps
Subsidiary IC’Alps will present full-turnkey custom ASIC and SoC development services, covering architecture, co-design, verification and production through partners such as TSMC, Intel Foundry, X-Fab, ams-OSRAM and GlobalFoundries. The offering highlights low-power design, miniaturization, robust IP protection and first-time-right silicon delivery.
4. TPM-FPGA Proof-of-Concept with Lattice
SEALSQ’s collaboration with Lattice Semiconductor delivers a reference TPM-FPGA architecture embedding post-quantum cryptography at the hardware level. Live demonstrations will showcase end-to-end device identities, zero-touch provisioning and compliance with NIST-selected and CNSA 2.0 PQC standards.