Silvaco Launches Mixel MIPI PRO IP Cutting Area 35% and Power 50%
Silvaco introduced availability of Mixel MIPI PRO IP including D-PHY, C-PHY and M-PHY silicon-proven across nine foundries and 12 nodes from 180nm to 5nm. Its proprietary MIPI D-PHY RX+ cuts area by 35% and leakage power by 50% while supporting up to 6.5Gbps per lane and 18.24Gbps per trio.
1. Product Launch Details
Silvaco has released the Mixel MIPI PRO IP portfolio, encompassing MIPI D-PHY v3.5, C-PHY v2.1 and M-PHY v4.1 connectivity IP. The offering is silicon-proven across nine foundries and 12 process nodes from 180nm down to 5nm, with TX, RX, TX+, RX+ and Universal implementations.
2. Technical Advantages
The proprietary MIPI D-PHY RX+ topology enables full-speed production testing without full universal configuration, reducing interface area by 35% and leakage power by 50%. The IP supports up to 6.5Gbps per lane for D-PHY and up to 18.24Gbps per trio for C-PHY, addressing high-performance requirements.
3. Strategic Market Expansion
The expanded IP portfolio targets mobile-adjacent and high-growth sectors such as automotive, VR/AR, IoT, wearables and sensors. Building on its earlier ASA Motion Link SerDes support, Silvaco aims to deepen its mixed-signal IP leadership and broaden its semiconductor IP ecosystem.