TSMC Reports $16B Q4 Profit and $56B CapEx Boosted by AI Demand
Taiwan Semiconductor Manufacturing reported Q4 2025 net profit of $16 billion, a 35% year-over-year increase, and raised its 2026 capital expenditure plan to $56 billion, citing strong AI-chip demand. However, the slower 2nm process ramp and capacity constraints from overseas fab expansions pose margin pressure and potential growth limits.
1. Conservative Outlook Gives Way to AI Confidence
Taiwan Semiconductor Manufacturing reported fourth-quarter net profit of $16 billion, representing 35 percent year-over-year growth, and for the first time in recent years the company lifted its long-term guidance on AI-related demand. CEO C.C. Wei stated that after extensive discussions with cloud service providers and chip designers, TSMC’s management is now convinced the multi-year AI megatrend will sustain elevated capacity utilization through 2027. The company’s foundry utilization rate for its 5-nanometer and 3-nanometer nodes exceeded 95 percent in Q4, compared with 87 percent a year ago.
2. Record Capital Expenditure Plans Signal Growth Trajectory
TSMC unveiled a $56 billion capital expenditure plan for fiscal 2026, up nearly 10 percent from the prior year, with the bulk of spending earmarked for advanced-node capacity expansion and development of 2nm process technology. Management highlighted that this level of investment is the highest in the company’s history, designed to add approximately 200,000 wafer starts per month at its Fab 18 and Fab 20 complexes. Analysts at Jefferies project that every incremental 10,000 wafer starts could generate an additional $1.2 billion in annual revenue once fully ramped.
3. Strategic Positioning in Global AI Supply Chain
As the world’s largest pure-play foundry, TSMC manufactures chips for leading fabless companies across the AI ecosystem, including multiple generations of Nvidia GPU dies and high-bandwidth memory modules used by cloud providers. The firm’s share of the global foundry market reached 55 percent by revenue in Q4, while its share of the AI-leading node capacity—process nodes at 5 nm and below—stood at over 70 percent. TSMC’s tight integration with chip designers and hyperscale data centers gives it unmatched visibility into future order flow for both training and inference workloads.
4. Potential Risks and Capacity Constraints
Despite record profitability, TSMC faces challenges that could temper near-term upside. The company’s two-tiered pricing strategy, which applies higher premiums on advanced-node wafers, has drawn pushback from smartphone customers concerned about margin erosion. Apple’s share of wafer revenues declined to 18 percent in the quarter, down from 22 percent a year earlier. Meanwhile, delays in ramping the 2 nm process and extended lead times at overseas expansions in Japan and the U.S. may compress gross margins by up to 300 basis points over the next two years if mix shifts toward mature nodes.