Cadence, Samsung Expand 2nm IP Certification with NVLink, SerDes and UCIe
CDNS•Cadence and Samsung Foundry agreed on a multi-year collaboration to certify Cadence’s Memory and Interface IP on Samsung’s second-generation 2nm node, covering NVIDIA NVLink-C2C interconnect, CUDA-X GPU libraries, high-speed SerDes, PCIe and UCIe interfaces. The deal also expands signoff-ready Cadence digital, custom and 3D-IC flows for AI systems.
1. Expanded Memory and Interface IP
Cadence broadens its portfolio of Memory and Interface IP certified on Samsung’s second-generation 2nm process, adding NVIDIA NVLink-C2C interconnect, CUDA-X GPU-accelerated libraries, high-speed SerDes, PCIe and UCIe memory interfaces to the roadmap.
2. Enhanced AI and 3D-IC Signoff Flows
The agreement deepens certification of Cadence’s digital (Innovus, Genus), custom (Virtuoso), 3D-IC (Integrity) and system design and analysis flows, delivering a signoff-ready platform for high-performance, low-power AI and HPC system designs.
3. Impact on AI Infrastructure and Edge Devices
Joint customers can leverage the production-proven platform to accelerate AI infrastructure, edge computing and intelligent device projects, achieving faster tapeouts and improved performance-per-watt at advanced nodes.
4. Strengthening Long-Term Partnership
This multi-year deal cements Cadence’s strategic alliance with Samsung Foundry, positioning both companies to meet surging demand for advanced-node AI semiconductors and reinforcing their leadership in cutting-edge design enablement.
