QuickLogic Secures $2.7M FPGA Hard IP Contract with 2026 Tape-Out
QuickLogic secured a seven-figure contract with a ceiling value of $2.7 million for discrete FPGA Hard IP, with revenue recognition starting in Q2 2026 and extending through Q1 2027. The contract targets GlobalFoundries’ 12LP process with tape-out scheduled in 2026 and includes Test Chips for a late-2026 Evaluation Kit.
1. Contract Award and Value
QuickLogic has been awarded a new discrete FPGA Hard IP contract carrying a ceiling value of $2.7 million. Revenue recognition under this contract begins in Q2 2026 and continues through Q1 2027, providing predictable inflows over four quarters.
2. Technical Scope and Timeline
Under the agreement, QuickLogic will design and tape-out FPGA Test Chips using GlobalFoundries’ 12LP fabrication process, with tape-out scheduled for later in 2026. These Test Chips will be integrated into an Evaluation Kit slated for release in late 2026.
3. Market and Strategic Implications
The Evaluation Kit will support common third-party development environments used by both defense and commercial customers, accelerating design cycles and lowering risk. QuickLogic is also exploring discrete FPGA chiplet Storefront devices to pair with third-party microcontrollers, with partner interest already emerging.