Rambus Launches SOCAMM2 Chipset Delivering 9.6 Gb/s LPDDR5X Efficiency for AI Servers
Rambus has unveiled its SOCAMM2 chipset, enabling detachable LPDDR5X server modules with up to 9.6 Gb/s throughput and integrated 12A and 3A voltage regulators for efficient power delivery. This first LPDDR-based server module solution positions Rambus to capture growing demand for low-power, scalable memory in AI data centers.
1. SOCAMM2 Chipset Launch
Rambus has introduced its SOCAMM2 chipset designed to power detachable LPDDR5X server memory modules offering up to 9.6 Gb/s throughput and integrating 12A and 3A voltage regulators alongside an SPD hub for module identification, configuration, and telemetry.
2. Optimizing AI Workloads
The SOCAMM2 chipset addresses rising AI data center demands by combining LPDDR efficiency with module-level serviceability and a compact form factor, delivering high performance at lower power consumption to support evolving compute density and power budgets.
3. Strategic Product Roadmap
SOCAMM2 is the first in Rambus's planned family of LPDDR-based server module chips, reflecting ongoing development of next-generation solutions aimed at broadening the company’s memory architecture offerings for future AI infrastructure.
4. Competitive and Market Impact
By extending its memory interface portfolio beyond DDR5 to LPDDR5X server modules, Rambus strengthens its competitive position and aims to capitalize on the expanding market for modular, scalable memory solutions in AI servers.