Synopsys, TSMC partner to accelerate AI chip design with agentic AI workflows - SNPS News | RalliesSynopsys, TSMC partner to accelerate AI chip design with agentic AI workflows
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SNPS• Synopsys and TSMC expand AI chip design collaboration
- Synopsys entered a collaboration with TSMC to speed development of next-generation AI and high-performance computing chips.
- The partnership covers certified EDA flows for TSMC’s A14 node, aiming to cut design risk and shorten time-to-tape-out.
- Joint work includes agentic AI-assisted design automation for analog, digital, and multi-die engineering workflows.
- The collaboration extends multi-die enablement on TSMC’s CoWoS packaging, targeting power integrity and thermal constraints in AI systems.
- The companies also expanded IP enablement on advanced nodes, citing milestones for PCIe 7.0 and HBM4 on TSMC’s N2P process.
