TSMC’s 32x P/E Justified by 20–30% CAGR and 63–65% Margins
TSMC trades at 32x trailing earnings on 20–30% revenue CAGR and near-50% net margins, driven by advanced N3, N2 and A16 node contributions. Value-capture pricing has lifted wafer ASPs ~20% annually, supporting gross margin guidance of 63–65% as CoWoS packaging capacity ramps to 120k wafers monthly.
1. Valuation Rethink: From Cyclical Foundry to AI Infrastructure Monopoly
Investors now price TSMC on the assumption of a durable AI super-cycle rather than the traditional foundry ups and downs. The shares trade at roughly 32 times trailing earnings and around 14.5 times revenue, levels justified only if revenue grows at 20–25% or more annually for several years and net margins approach 50%. Analysts model high-20s to 30% compound annual growth through 2029, reflecting TSMC’s quasi-monopolistic grip on advanced process nodes (N3, N2, A16) and its ability to capture value via energy-efficiency-driven pricing models that reward customers in joules-per-token economics.
2. Stellar December Quarter Performance Drives Margin Expansion
In the December quarter, TSMC reported revenue of TWD 1.05 trillion, up 20.5% year-over-year, while net income rose 40.6% to TWD 505.7 billion, pushing net margin to 48.4%. Earnings per share climbed 35% to TWD 19.50, and EBITDA reached TWD 733.2 billion (+23.5%). Operating expenses grew just 2.4%, underscoring tight cost control. Free cash flow remained robust at TWD 223.1 billion despite elevated capex, enabling the company to sustain a USD 52–56 billion annual investment plan alongside a modest dividend yield.
3. Advanced Nodes and Packaging Cement Competitive Moat
Around 77% of revenue now derives from N7 and below, with N3 accounting for 28% and N5 for 35%. High-performance computing fuels 55% of sales, versus 32% for smartphones. TSMC’s N3 capacity will rise from 150k wafers per month to ~180k in 2026 and potentially 250k in 2027; N2 is on track to scale from 35k wafers monthly in 2025 to 130–140k in 2026 and possibly 200k in 2027. Meanwhile, CoWoS advanced packaging capacity is slated to increase from 75k wafers per month to 120k in 2026 and 170k in 2027, reinforcing customer lock-in by coupling leading lithography with high-bandwidth memory integration.
4. Key Risks: Node Economics, Capex Timing and Geopolitics
TSMC’s bull case hinges on continued yield improvements and cost reductions at N2 and beyond. Any inversion of node economics—such as multi-patterning EUV complexity driving up cycle times and lowering yields—could pressure margins below the long-term 56% target. Misalignment between capex spending and demand ramps would strain free cash flow, while escalating geopolitical tensions over Taiwan present execution and supply chain risks. Investors are watching management’s ability to navigate these variables without sacrificing the super-cycle thesis.