TSMC Posts 20.5% Q4 Revenue Growth, Guides $52–56 B Capex
TSMC’s December quarter revenue rose 20.5% YoY to TWD 1.05 trn, net income soared 40.6% to TWD 505.7 bn, driving near-50% net margins and a 32x trailing P/E at ~$336. Advanced nodes account for over 60% of sales and CoWoS packaging supports USD 52–56 bn capex, while wafer ASPs climb 20% annually on value pricing.
1. TSMC’s Strategic Role in America’s AI Ambitions
Taiwan Semiconductor Manufacturing Company serves as the primary foundry partner for the leading U.S. AI chip designers, supporting over 90% of advanced data-center GPU production. Its Arizona fabrication complex has moved from pilot production into commercial ramp-up, adding capacity for 5-nanometer and 3-nanometer nodes. This domestic footprint satisfies U.S. government incentives while shortening supply chains and providing resilience for hyperscale customers. TSMC’s engagements include multi-year supply agreements with three of the top five AI infrastructure providers, positioning it as an indispensable element in America’s computing backbone.
2. Robust 2025 Financial Performance
In fiscal 2025, TSMC reported revenue of $122.4 billion, a 36% year-over-year increase, marking its first annual revenue above $100 billion. Gross margin expanded from 56.1% to 59.9%, and operating margin rose from 45.7% to 50.8%. Fourth-quarter gross margin reached 62.3% with an operating margin of 54.0%. Net income climbed by more than 40%, reflecting strong pricing power on advanced nodes and further reinforcing the company’s ability to convert incremental wafer shipments into outsized profit growth.
3. Capital Expenditure and Capacity Roadmap
TSMC has committed to capital expenditures of $52 billion to $56 billion in 2026, up approximately 20% from the prior year, with investments concentrated on its 3-nanometer and 2-nanometer node expansions, advanced packaging facilities, and the second Arizona fab line. Production capacity for 3-nanometer wafers is slated to grow from 150,000 to 200,000 wafers per month by late 2026, while 2-nanometer output is on track to quadruple. Advanced packaging throughput, including CoWoS (chip-on-wafer-on-substrate) modules, is expected to increase by 60%, addressing packaging bottlenecks for high-performance GPUs.
4. Valuation Gap and Upside Potential
Despite its dominant position in high-end foundry services and sustained double-digit top-line growth, TSMC trades at roughly 25 times next-year earnings forecasts, representing a significant discount to comparable pure-play foundries and fabless peers. On a forward PEG basis, the company sits below 1.0 against a sector median near 1.6, even though TSMC targets 20-25% annual revenue growth and net margins near 50%. Should the market reprice the shares to reflect sustained AI-driven expansion and durable pricing power, upside scenarios in the range of 40% to 60% above current levels become plausible.