
Arteris announced a partnership with IC-Link by imec to integrate its network-on-chip IP into IC-Link’s high-speed I/O subsystem reference design for next-generation AI and HPC chiplets and ASICs. The collaboration targets reduced infrastructure development effort and accelerated delivery of complex custom silicon platforms.
Arteris has partnered with IC-Link by imec to embed its high-performance, energy-efficient network-on-chip IP within IC-Link’s high-speed I/O subsystem reference design. This joint effort is focused on streamlining the development of next-generation AI and high-performance computing chiplets and ASICs.
IC-Link will leverage Arteris NoC IP to create a reusable, scalable architecture that minimizes costly rework of advanced node I/O subsystems. By improving design reuse and lowering integration complexity, the combined solution enables engineering teams to concentrate on accelerator core optimization.
The collaboration is expected to reduce development risk and shorten time-to-market for custom semiconductor platforms in AI and HPC applications. It underscores a broader industry shift toward modular, reusable interconnect infrastructures to handle escalating design complexity.
This partnership positions Arteris to expand its IP licensing footprint as demand rises for AI ASICs and HPC platforms, potentially boosting recurring royalty revenue. For IC-Link, integrating proven NoC technology strengthens its ASIC service offerings and appeal to high-performance computing and AI developers.